Establishing Fast Charge Current Limits

A fast charge current limit is not one number. It is a surface: current versus cell temperature, versus state of charge, and versus how far the cell has aged. The Fast Charging page covers why the current has to be limited at all – lithium plating at the anode is the dominant constraint. This page looks at the practical side: how that limit is actually derived, and why it moves with temperature and state of health (SoH).

Where the Numbers Come From

The starting point is almost always a Hybrid Pulse Power Characterization (HPPC) test, run across a grid of temperature and state-of-charge points – a short current pulse at each point, with the voltage response used to extract the cell’s internal resistance at that condition [1]. Resistance at a given temperature and SoC sets how much the anode potential drops for a given charge current, and the anode potential is what actually has to stay above 0 V vs Li/Li⁺ to avoid plating. In effect, the HPPC grid is converted into a current limit grid: the highest current at each temperature/SoC point that keeps a defined voltage margin against that threshold.

Where a cell supplier only tests a handful of corner points rather than the full grid, you end up with the kind of coarse, stepped charge-current profile described on Stepped Fast Charge Limits – safe, but conservative in the gaps between tested points because nobody has data to say the current could be joined up smoothly.

Why Temperature Moves the Limit

Below roughly 10–15°C, charge-transfer kinetics at the anode slow down and cell impedance rises sharply, so the same current produces a bigger voltage drop and plating risk goes up – this is why low-temperature charge current is cut hard, and why charging is often blocked outright near or below freezing. At the other end, raising temperature lowers impedance and buys back some current, but only up to a point: push too far and the limit is increasingly set by side-reaction rates and the thermal system’s ability to remove heat rather than by plating risk. Between those two ends there is usually a broad, fairly flat plateau – commonly cited as somewhere in the 20–45°C range – where the achievable charge rate is close to its maximum [2].

Why State of Health Moves the Limit

Ageing mechanisms – SEI growth, loss of electrical contact within the electrode, lithium inventory loss – raise a cell’s internal impedance over its life. A more resistive cell suffers a larger voltage drop for the same charge current, so the anode potential reaches the 0 V plating threshold at a lower current than it did when the cell was new. A charge current table calibrated only on beginning-of-life HPPC data will therefore under-protect an aged cell unless it is corrected for SoH.

In practice this correction is handled one of three ways: a fixed derating curve applied against a proxy for age, such as cycle count, calendar age or measured capacity fade; periodic re-characterization, where a scaled-down HPPC or reference performance test (see Performance Testing and Accelerated Testing) is repeated through life and the lookup table is refreshed from the new impedance data; or a model-based approach, where the BMS tracks impedance growth directly (often from the same kind of pulse data used for state-of-health estimation) and derates the current limit continuously rather than through a fixed table.

Practical note: a current limit table that only varies with temperature and SoC, and never with SoH, is a common simplification in early-stage BMS calibration. It is conservative to leave headroom at beginning of life, but if that headroom isn’t actually re-checked against ageing data it can quietly disappear as the pack ages, particularly for cells cycled hard or stored at high SoC.